Title
A comprehensive model to accurately calculate the gate capacitance and the leakage from DC to 100 MHz for ultra thin dielectrics
Author
Publication type
conferenceObject
Publication
Source (journal)
ICMTS 2006: Proceedings of the 2006 International Conference on Microelectronic Test Structures
Source (book)
International Conference on Microelectronic Test Structures (ICMTS 2006), MAR 06-09, 2006, Austin, TX
Volume/pages
(2006) , p. 222-225
ISBN
1-4244-0167-4
ISI
000237219700037
Carrier
E
Target language
English (eng)
Affiliation
University of Antwerp
Abstract
A straightforward model and experimental methodology to extract simultaneously the gate capacitance and the gate leakage is presented for ultra thin oxides. Parasitic effects at high frequencies are minimized using a transmission-line approach while a robust extraction algorithm accounts for eventual instrument inaccuracies.
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