Title
|
|
|
|
A comprehensive model to accurately calculate the gate capacitance and the leakage from DC to 100 MHz for ultra thin dielectrics
| |
Author
|
|
|
|
| |
Abstract
|
|
|
|
A straightforward model and experimental methodology to extract simultaneously the gate capacitance and the gate leakage is presented for ultra thin oxides. Parasitic effects at high frequencies are minimized using a transmission-line approach while a robust extraction algorithm accounts for eventual instrument inaccuracies. |
| |
Language
|
|
|
|
English
| |
Source (journal)
|
|
|
|
ICMTS 2006: Proceedings of the 2006 International Conference on Microelectronic Test Structures
| |
Source (book)
|
|
|
|
International Conference on Microelectronic Test Structures (ICMTS 2006), MAR 06-09, 2006, Austin, TX
| |
Publication
|
|
|
|
2006
| |
ISBN
|
|
|
|
1-4244-0167-4
| |
Volume/pages
|
|
|
|
(2006)
, p. 222-225
| |
ISI
|
|
|
|
000237219700037
| |
|