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Title
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Exploration of system-level trade-offs for application mapping in multiprocessor system-on-chips
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Author
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Abstract
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| In order to meet heavy constraints for power, performance and flexibility, applications on future hand-held devices will be executed on architectures with multiple processors. However, this will only succeed if the application is mapped using an efficient, coarse-grained parallelization. The final performance of the parallel-executed applications heavily depends on the partitioning, the architecture characteristics, the memory hierarchy,... Since it is very hard for a designer to oversee the effect of these interactions manually, tools should be developed. The current PhD explores these issues based on real-life examples of wavelet still image, video and volumetric coding. |
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Language
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English
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Source (journal)
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2005 PhD Research in Microelectronics and Electronics, Vols 1 and 2, Proceedings
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Source (book)
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International Conference on PhD Research in Microelectronics and, Electronics (PRIME 2005), Lausanne, SWITZERLAND
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Publication
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2005
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ISBN
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0-7803-9345-7
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Volume/pages
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(2005)
, p. 426-429
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ISI
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000234682000108
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