Publication
Title
Exploration of system-level trade-offs for application mapping in multiprocessor system-on-chips
Author
Abstract
In order to meet heavy constraints for power, performance and flexibility, applications on future hand-held devices will be executed on architectures with multiple processors. However, this will only succeed if the application is mapped using an efficient, coarse-grained parallelization. The final performance of the parallel-executed applications heavily depends on the partitioning, the architecture characteristics, the memory hierarchy,... Since it is very hard for a designer to oversee the effect of these interactions manually, tools should be developed. The current PhD explores these issues based on real-life examples of wavelet still image, video and volumetric coding.
Language
English
Source (journal)
2005 PhD Research in Microelectronics and Electronics, Vols 1 and 2, Proceedings
Source (book)
International Conference on PhD Research in Microelectronics and, Electronics (PRIME 2005), Lausanne, SWITZERLAND
Publication
2005
ISBN
0-7803-9345-7
Volume/pages
(2005), p. 426-429
ISI
000234682000108
UAntwerpen
Publication type
Affiliation
Publications with a UAntwerp address
External links
Web of Science
Record
Identification
Creation 03.01.2013
Last edited 06.11.2017
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