Title
Engineering of an insulating buffer and use of AlN interlayers : two optimisations for AlGaN-GaNHEMT-like structures Engineering of an insulating buffer and use of AlN interlayers : two optimisations for AlGaN-GaNHEMT-like structures
Author
Faculty/Department
Faculty of Sciences. Physics
Publication type
article
Publication
Berlin ,
Subject
Physics
Source (journal)
Physica status solidi: A: applied research. - Berlin
Source (book)
6th International Workshop on Expert Evaluation and Control of Compound, Semiconductor Materials and Technologies (EXMATEC 2002), MAY 26-29, 2002, BUDAPEST, HUNGARY
Volume/pages
195(2003) :1 , p. 93-100
ISSN
0031-8965
ISI
000180796700014
Carrier
E
Target language
English (eng)
Full text (Publishers DOI)
Affiliation
University of Antwerp
Abstract
The semi-insulating character of GaN epitaxial layers can be achieved by the control of the early stages of growth on the substrate. Adding two low temperature (LT) AlN interlayers is a technique enough powerful to reduce threading dislocation densities by up to one order of magnitude. A compressive strain as high as 2.8 x 10(-3) is induced in the uppermost GaN epilayer. The global structure is kept semi-insulating so that,it is a perfect template for undoped AlGaN-GaN HEMTs (High Electron Mobility Transistors). HEMTs with interlayers present better two dimensional electron gas (2DEG) properties: up to 20% higher carrier density (n(S)) and 40% higher mobility. Typically n(S) is as high as 1.7 x 10(13) cm(-2) for a record mobility of 1200 cm(2)/Vs. The improvement of the mobility can be correlated to the reduction of nano-scale V-shaped defects in the AlGaN (less morphological-relaxation). The improvement of n(S) could be explained by the higher piezo-doping resulting from GaN extra-compression and AlGaN weaker relaxation. As a consequence, the DC transistors characteristics are improved: in 2 mum gate transistors, the maximum current and transconductance are increased by up to 80% and 20%, respectively, and could be extrapolated to values as high as 1500 mA/mm and 250 mS/mm for 0.2 mum gate devices.
E-info
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