Title
Line edge roughness : characterization, modeling and impact on device behavior
Author
Publication type
conferenceObject
Publication
Subject
Physics
Computer. Automation
Source (journal)
International electron devices 2002 meeting, technical digest
Source (book)
IEEE International Electron Devices Meeting, DEC 08-11, 2002, SAN FRANCISCO, CA
Volume/pages
(2002) , p. 307-310
ISBN
0-7803-7462-2
ISI
000185143400070
Carrier
E
Target language
English (eng)
Affiliation
University of Antwerp
Abstract
Simple analytical expressions are presented, which calculate the impact of line edge roughness on MOSFET parameter fluctuations. It is experimentally demonstrated that LER has no impact on 80 nm gate length transistors. Simulations show LER to become significant for 32 nm channel length devices.
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