Title
Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits
Author
Faculty/Department
Faculty of Applied Engineering Sciences
Publication type
article
Publication
New York, N.Y. ,
Subject
Computer. Automation
Source (journal)
IEEE transactions on computer-aided design of integrated circuits and systems. - New York, N.Y.
Volume/pages
22(2003) :5 , p. 517-534
ISSN
0278-0070
ISI
000182503300001
Carrier
E
Target language
English (eng)
Full text (Publishers DOI)
Abstract
This paper presents an overview of methods to automatically generate posynomial response surface models for the performance characteristics of analog integrated circuits based on numerical simulation data. The methods are capable,of generating posynomial performance expressions for both linear and nonlinear circuits and circuit characteristics, at SPICE-level accuracy. This approach allows for automatical generation of an accurate sizing model for a circuit that composes a geometric program that fully describes the analog circuit sizing problem. The automatic generation avoids the time-consuming and approximate nature of hand-crafted analytic model generation. The methods are based on techniques from design of experiments and response surface modeling. Attention is paid to estimating the relative "goodness-of-fit" of the generated models. Experimental results illustrate the capabilities and effectiveness of the presented methods.
E-info
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