Title
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Towards an approach for translation validation of thread-level parallelizing transformations using colored Petri nets
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Author
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Abstract
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Software applications often require the transformation of an input source program into a translated one for optimization. In this process, preserving the semantics across the transformation also called equivalence checking is essential. In this paper, we present ongoing work on a novel translation validation technique for handling loop transformations such as loop swapping and distribution, which cannot be handled by state-of-the-art equivalence checkers. The method makes use of a reduced size Petri net model integrating SMT solvers for validating arithmetic transformations. The approach is illustrated with two simple programs and further validated with a programs benchmark. |
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Language
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English
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Source (book)
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Proceedings of the 16th International Conference on Software Technologies, July 06-08, 2021
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Publication
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2021
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ISBN
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978-989-758-523-4
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DOI
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10.5220/0010581005330541
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Volume/pages
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1
(2021)
, p. 533-541
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ISI
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000777981500054
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Full text (Publisher's DOI)
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