Publication
Title
Towards an approach for translation validation of thread-level parallelizing transformations using colored Petri nets
Author
Abstract
Software applications often require the transformation of an input source program into a translated one for optimization. In this process, preserving the semantics across the transformation also called equivalence checking is essential. In this paper, we present ongoing work on a novel translation validation technique for handling loop transformations such as loop swapping and distribution, which cannot be handled by state-of-the-art equivalence checkers. The method makes use of a reduced size Petri net model integrating SMT solvers for validating arithmetic transformations. The approach is illustrated with two simple programs and further validated with a programs benchmark.
Language
English
Source (book)
Proceedings of the 16th International Conference on Software Technologies, July 06-08, 2021
Publication
2021
ISBN
978-989-758-523-4
DOI
10.5220/0010581005330541
Volume/pages
1 (2021) , p. 533-541
ISI
000777981500054
Full text (Publisher's DOI)
UAntwerpen
Publication type
Subject
External links
Web of Science
Record
Identifier
Creation 24.01.2024
Last edited 25.01.2024
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