Low-power hardware accelerator for detrending measured biopotential data

Mittal, Rakshit; Prince, A. Amalin; Nalband, Saif; Robert, Femi; Agastinose Ronickom, Jac Fredo

doi:10.1109/TIM.2020.3018235

Title

Low-power hardware accelerator for detrending measured biopotential data

Author

Mittal, Rakshit

Prince, A. Amalin

Nalband, Saif

Robert, Femi

Agastinose Ronickom, Jac Fredo

Abstract

Biopotential data measurement plays an important role in monitoring the body’s physiological functions. It is affected by noise from various sources for different signals adversely affecting the ability to interpret them. The traditional methods of data detrending are either computationally inefficient, power-intensive, or have high latency. The maximum–mean–minimum (MaMeMi) filter reported for electrocardiogram (ECG) denoising is a computationally efficient algorithm. The MaMeMi filter response depends on two filter coefficients. In the real time, it is difficult to gauge the characteristics of the detected signal beforehand. In this article, we propose an adaptive-MaMeMi (AMaMeMi) filter, which adaptively computes the filter coefficients according to the properties of the input. We have used hardware–software codesign techniques for the optimized implementation of the AMaMeMi filter. The proposed hardware accelerator architecture for the AMaMeMi filter can be used in both adaptive and manual modes of operation. The hardware accelerator is tested for various biopotential signal detrendings, and the single hardware is capable of eliminating baseline wander from all considered measurements with less computational costs and low latency. We implemented the AMaMeMi filter on Xilinx Zynq-7000 system-on-chip (part number XCZ7020-CLG484-1) and statistically verified the results. The hardware accelerator implementation results provide a good correlation with MATLAB simulation results. The hardware accelerator implementation provides an average correlation of 0.9999, a normalized root-mean-square error of 0.0038, and a maximum signal-to-noise ratio (SNR) gain of 19 dB. The low computational complexity of the proposed architecture implies low-power consumption. It consumes 12 mW at 100-MHz clock and 0.7 mW at 500-Hz clock.

Language

English

Source (journal)

IEEE transactions on instrumentation and measurement. - New York, N.Y.

Publication

New York, N.Y. : 2021

ISSN

0018-9456

DOI

10.1109/TIM.2020.3018235

Volume/pages

70 (2021) , p. 1-9