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Title
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Modeling the single-gate, double-gate, and gate-all-around tunnel field-effect transistor
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Author
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Abstract
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| Tunnel field-effect transistors (TFETs) are potential successors of metal-oxide-semiconductor FETs because scaling the supply voltage below 1 V is possible due to the absence of a subthreshold-swing limit of 60 mV/decade. The modeling of the TFET performance, however, is still preliminary. We have developed models allowing a direct comparison between the single-gate, double-gate, and gate-all-around configuration at high drain voltage, when the drain-voltage dependence is negligible, and we provide improved insight in the TFET physics. The dependence of the tunnel current on device parameters is analyzed, in particular, the scaling with gate-dielectric thickness, channel thickness, and dielectric constants of gate dielectric and channel material. We show that scaling the gate-dielectric thickness improves the TFET performance more than scaling the channel thickness and that improvements are often overestimated. There is qualitative agreement between our model and our experimental data. |
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Language
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English
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Source (journal)
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Journal of applied physics / American Institute of Physics. - New York, N.Y., 1937, currens
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Publication
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New York, N.Y.
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American Institute of Physics
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2010
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ISSN
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0021-8979
[print]
1089-7550
[online]
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DOI
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10.1063/1.3277044
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Volume/pages
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107
:2
(2010)
, p. 024518,1-024518,8
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ISI
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000274180600122
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Full text (Publisher's DOI)
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